1. Field of the Invention
The present invention relates to semiconductors and transistors and more particularly to Si/SiGe strained-layer field-effect transistors.
2. Description of the Prior Art
Si/SiGe strained layer heterostructures are interesting devices for future high-performance microelectronics applications. In particular, tensile-strained Si on relaxed SiGe MOSFETs have been proposed for advanced CMOS applications, while Si/SiGe modulation-doped field-effect transistors (MODFETs) are of interest for advanced communications applications. Field-effect transistors based upon Si/SiGe strained layers have the common feature that they rely on enhanced mobility to achieve performance improvement. This is especially true for tensile-strained Si on relaxed SiGe MODFETs which can have mobility enhancement factors of 3-5 times for electrons as described in the reference to K. Ismail, entitled “Si/SiGe high-speed field-effect transistors,” Tech. Dig. Int. Electron Devices Meet., 509 (1995) (herein incorporated by reference) and for compressive-strained Ge on relaxed SiGe MODFETs which have hole mobility over 10 times higher than bulk Si MOSFETs as described in the reference to S. J. Koester, R. Hammond, J. O. Chu, entitled “Extremely high transconductance Ge/Si0.4Ge0.6 p-MODFET's grown by UHV-CVD,” IEEE Elect. Dev. Lett. 21, 110 (2000) (herein incorporated by reference).
However, in order to make a high-performance FET, device design factors in addition to mobility must be considered. In particular, control of short-channel effects is a serious issue for devices with very short gate lengths as recognized by Q. C. Ouyang, S. J. Koester, J. O. Chu, A. Grill, S. Subbanna, and D. A. Herman Jr., at the International Conference on Simulation of Semiconductor Processes and Devices, Kobe, Japan, Sep. 4-6, 2002. In Si MOSFETs, short-channel effects are generally controlled through counter-doping, i.e., introducing carriers of the opposite type into the body of the device in order to maintain a high built-in potential between the source and drain p/n junctions. In Si MOSFETs, counter doping is generally introduced by ion implantation directly through the active area of the device.
As for SiGe MODFETs, however, implantation of dopants through the active device area can seriously degrade the mobility. The mobility degradation occurs because the trailing edge of the implant profile intersects the high-mobility channel. Since impurity concentrations as low as 1015 cm−2 can degrade the mobility, even implants with peak concentrations well below the channel region cannot be used. Therefore, it is essential in SiGe MODFETs that the channel region be completely free of implanted impurities in order to maintain the high mobility. An example of the deleterious effect of ion implantation through a Si/SiGe n-channel MODFET structure is shown in the plot of FIG. 1(a) illustrating curves 15 showing decreased electron mobility with implant impurities present as compared to the curves 12 showing no implant impurities present.
One possible option for MODFETs is simply to eliminate the counter-doping, a practice common in III-V devices. However, unlike III-V devices, where high band-gap barrier layers can reduce parallel conduction, the SiGe barrier layers do no provide this opportunity. A demonstration of the need for counter-doping in Si/SiGe n-MODFETs is shown in the plot of FIG. 1(b), which shows experimental data of a scaled Si/SiGe n-MODFET with no p-well along with physical simulations of a very similar device with p-type counter doping. The device without counter doping (p-well) shows severe short-channel effects and large source/drain leakage current, while the simulations show that with the proper p-well doping the same device would exhibit near ideal subthreshold behavior.
To date, no method of introducing counter doping into SiGe MODFETs have been explicitly suggested. However, the concept of incorporating the doping via an in situ doping process has been proposed and implemented using tensile-strained Si surface channel MOSFETs in the reference to K. Rim, J. L. Hoyt, J. F. Gibbons, entitled “Fabrication and analysis of deep submicron strained-Si N-MOSFET's,” IEEE Trans. on Elect. Dev. 47, 1406 (2000). However, this technique is not applicable for a layer structure grown on a pre-fabricated relaxed SiGe substrate where the regrown layer structure needs to be kept thin, since the doping is only incorporated in the epitaxially regrown layer, and therefore the underlying substrate could still act as a leakage path. A good example of this is situation occurs for a MODFET fabricated on a buried insulating layer, where the typical fabrication scheme would be to first produce a wafer of relaxed SiGe on insulator, and then regrow the MODFET layer structure on top. In this situation, in situ doping of the p-well during growth would still leave the original SiGe substrate undoped. In situ doping is also a problem for p-channel SiGe MODFETs, since the counter doping would have to be n-type, and many common n-type dopants have a high surface affinity during growth, segregating to the surface and causing unintentional dopant incorporation into the channel layer.
It would thus be highly desirable to produce a high-mobility semiconductor layer structure and field-effect transistor exhibiting a high-mobility conducting channel, while at the same time, maintaining counter doping to control deleterious short-channel effects. It would also be highly desirable to provide a method of fabricating such a layer structure and transistor.